发明名称 MEMORY MULTIPLEXING SYSTEM
摘要 PURPOSE:To reduce the cost for a memory multiplexing system by reading an auxiliary memory page if having the same contents as those of a real page into a real memory to continue the execution of an instruction of the real page when an error occurs while the instruction of the real page is executed. CONSTITUTION:A page table 240, an external page table 250 and a replacement bit 260 are used in addition to a real memory 210 and an auxiliary memory 220 in order to obtain a virtual memory 230 to which the logical reference is possible from a CPU 200. The table 240 shows the corresponding relation between both memories 210 and 220. The bit 260 shows the replacement of the real pages on the memory 210. Then, when a detector included in the CPU 200 detects the generation of a memory access fault at the time of executing the reference, the replacement and the instruction to the real pages, the pages of the memory 220 are read into the memory 210 in terms of the multiplexed pages with reference to both tables 240 and 250 and the bit 260.
申请公布号 JPS63293653(A) 申请公布日期 1988.11.30
申请号 JP19870128115 申请日期 1987.05.27
申请人 HITACHI LTD 发明人 KINOSHITA TOSHIYUKI;KATADA HISASHI;KURIYAMA SHIHOU;YOSHIZAWA YASUFUMI
分类号 G06F12/08;G06F12/12;G06F12/16 主分类号 G06F12/08
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