| 摘要 |
PURPOSE:To reduce the performance fluctuation of a three-state circuit, by connecting drain or source electrodes of transistors between the gates of output transistors and controlling the gate electrodes of the transistors with output controlling signals. CONSTITUTION:MOS transistors 9 and 10 which are controlled by output controlling signals are connected between the gate of a (p) channel output MOS transistor 7 and the gate of an (n) channel output MOS transistor 8. Since the MOS transistor 9 connected between the gates of the (p) and (n) channel output MOS transistors 7 and 8 is turned on when the output controlling signals are low in level, outputs of a NAND gate 5 and NOR gate 6 are set in a short-circuited state. Therefore, the data of a data input terminal are transmitted to the output MOS transistors 7 and 8 by means of an inverter circuit practically composed of a (p) channel MOS transistor 11 and (n) channel MOS transistor 19. As a result, the performance fluctuation of this three-state circuit caused by the characteristic variation of the MOS transistors can be reduced. |
