发明名称 |
COMMUNICATION PROCESSOR |
摘要 |
PURPOSE:To improve the transmitting throughput of a communication system by transmitting the transfer request signal and the transfer request confirmation signal for both reception data and status between a direct memory access (DMA) control part and a serial communication control part. CONSTITUTION:Both the transfer request signal and the transfer request confirmation signal for reception data and reception status are transmitted between a DMA control part DMAC of a communication processor NPU and a serial communication control part SIO. The communication data and the reception status of plural frames transferred continuously are transferred to a random access memory RAM for temporary storage via the DMAC without requiring the processing carried out by a central processing part for each frame. |
申请公布号 |
JPS63293658(A) |
申请公布日期 |
1988.11.30 |
申请号 |
JP19870128311 |
申请日期 |
1987.05.27 |
申请人 |
HITACHI LTD;HITACHI MICRO COMPUT ENG LTD |
发明人 |
MIYAZAKI KENJI;MURAKAMI TAKASHI;NAKADA KUNIHIKO;OKOCHI TOSHIO |
分类号 |
H04L29/10;G06F13/00;G06F13/28 |
主分类号 |
H04L29/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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