发明名称 PROGRAMMABLE LOGIC ARRAY
摘要 PURPOSE:To make a programmable logic array into IC formation, by controlling the conduction of plural sets of transistors which are connected in series and constitute an input decoder with input signals or inverted input signals and obtaining prescribed logic against the input signals and inverted input signals. CONSTITUTION:This programmable logic array is constituted of an input decoder 31 which outputs different prescribed logic to input signals X1 and X2 and inverted input signals, transistors 47a-47d which give the different logic outputs of the decoder 31 to corresponding input lines 49a-49d of an AND array area, and a transistor 55 which precharges the input lines 49a-49d of the AND array area and the conduction of plural sets of transistors 37a-37d and 39a-39d which are connected in series is controlled by the input signals X1 and X2 and inverted input signals. As a result, prescribed logic outputs can be obtained against the input signals X1 and X2 and inverted input signals. Therefore, this programmable logic array can be made into IC formation.
申请公布号 JPS63294124(A) 申请公布日期 1988.11.30
申请号 JP19870128365 申请日期 1987.05.27
申请人 TOSHIBA CORP 发明人 USAMI MASAYOSHI
分类号 H03K19/177;H03M7/00 主分类号 H03K19/177
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