| 摘要 |
<p>A phase comparator (70) included in a phase locked loop (PLL) for comparing two input signals with respect to phase to thereby determine their phase difference includes two multipliers (36, 38) and two low-pass filters (40,42) for producing a sine component signal and a cosine component signal which are associated with the phase difference. A discrimination signal representative of a polarity is generated on the basis of one of those two component signals, and a phase error signal is generated on the basis of the other of them. The phase error signal monotonously increases during predetermined one period which is determined by the discrimination signal, i.e. (2n - 1) pi to (2n +1) pi where n is 0, +/-1, +/-2 and so on. A PLL using such a phase comparator is allowed to rapidly converge to a stable point even when the phase error is close to an unstable point, i.e., +/-(2n - 1) where n is 0, 1, 2 and so on, achieving an extremely short acquisition time.</p> |
