CLOCK PHASE CONTROL CIRCUIT

摘要

PURPOSE:To reduce ringing, by detecting a ringing quantity by using a pulse waveform to detect waveform distortion information inserted in the vertical synchronizing section of a transmission signal, and performing loop control by changing a clock phase so as to minimize the quantity. CONSTITUTION:A waveform memory 6 updates the sample value xk of a pulse in the vertical synchronizing signal of a TV signal in order and stores it. A peak detector 14 inputs the maximum value x0 of the value xk, and finds the ringing quantity ek by using the value xk(knot equal to 0). In a weight coefficient memory 16, a weight coefficient ak shown in figure is stored. A multiplier 17 multiplies the ek by the ak, and an error computing element 18 estimates a product value a.ek in order, and outputs an error signal E. A register 20 supplies a preceding error signal E' for the signal E to a comparator 19. The comparator 19 compares the values of the signals E and E', and decides a correction value (d) based on the polarity of a correction value (d'), and outputs it to an accumulator 21 and a register 22. The correction value (d') is a preceding correction value. The value of the correction value (d) changes in the same direction as before or in a reverse direction, respectively, when it is EE'. The accumulated value D of the correction value (d) is superposed on a phase difference output 7, and receives the loop control.