发明名称 FLIP-FLOP CIRCUIT
摘要 PURPOSE:To achieve a reduction in the number of signal lines for which a value of FF is to be set, by method wherein an address signal is applied to specify an address after the setting of one specified binary data for an FF circuit and an inversion data output signal is inputted into a data input terminal being switched from a data input signal to set the FF circuit to another value in the binary data. CONSTITUTION:This FF circuit makes a component of random accessible logical circuit with an address alloted to each circuit and has setting and resetting input terminals. Then, the circuit is controlled by an address signal specifying the address and a switching means is provided to supply an inversion data output signal to a data input terminal being switched from a data input signal. Thus, an input is applied to one of setting and resetting input terminals to set the FF circuit to a first state and an inversion data output signal is supplied to a date input terminal being switched from a data input signal in response to an input of an address signal to set the FF circuit to the a second state.
申请公布号 JPS63289471(A) 申请公布日期 1988.11.25
申请号 JP19870124841 申请日期 1987.05.21
申请人 NEC CORP 发明人 KAWAI MASATO;KATO JUNKO
分类号 G01R31/317;G01R31/28;G06F11/22 主分类号 G01R31/317
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