| 摘要 |
PURPOSE:To keep the relative phase between a write clear pulse and a video signal fixed, by discriminating phase polarities of a frequency divided clock and a burst signal and inverting the output of a phase comparator in accordance with discrimination outputs. CONSTITUTION:The frequency divided clock outputted from a frequency dividing counter 71 is inputted to one input terminal of each of a phase polarity discriminating circuit 75 and a polarity control circuit 76, and the phase polarity discriminating circuit 75 discriminates phase polarities of the color burst signal and the frequency divided clock, and the polarity control circuit 76 inverts or non- inverts the phase of the frequency divided clock in accordance with discrimination outputs of the circuit 75 and supplies this clock to a phase comparator 72. Consequently, residual phase error having a correct polarity is always obtained because the relative phase of the color burst signal and the frequency divided clock is kept at 90 deg.. Even if the operation of a frequency dividing counter 33 of a PLL circuit 3 is stopped or preset at the time of special reproducing, the phase is synchronized by the write clear pulse. Thus, the relative phase between the read video signal and the write clear pulse is kept fixed.
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