发明名称 ERROR CORRECTION CIRCUIT
摘要 PURPOSE:To attain actuate error correction, and to attain simple constitution and small size, by calculating an error pattern based on a syndrome and error location and adding a calculated error pattern to the data symbol commanded by the error location. CONSTITUTION:In correcting a maximum of four symbol errors for example, at first whether or not an error symbol number Nerr is '0' is discriminated and when '0', it is discriminated to be YES and the operation is finished. When not '0', it is discriminated to be NO and whether or not the symbol number Nerr is larger than 4 is discriminated, and in case of Nerr>4, the correction is disabled and a correction flag is added, and in case of Nerr<=4, all error patterns are calculated to apply the correction processing. Thus, syndromes S0-S3 are transferred to a syndrome register 16 via a bus 15 and an error location Xj is transferred to an error location register 18 and the calculated result is latched respectively by latch circuits L2, L3.
申请公布号 JPS63288522(A) 申请公布日期 1988.11.25
申请号 JP19870122407 申请日期 1987.05.21
申请人 TOSHIBA CORP 发明人 MIYANO YUICHI
分类号 H03M13/00 主分类号 H03M13/00
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