发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To form a complementary bipolar Tr and a complementary MOS Tr on one substrate efficiently, by forming a P-type collector embedded layer and a P-type collector region in one island region, and forming a vertical type P-N-P transistor Tr. CONSTITUTION:On the surface of one island region 25 on a semiconductor substrate 21, a P-type base region 27 and an N<+> type emitter region 28 are formed, and an N-P-N Tr 26 is formed. In another region 25, a P<+> type collector embedded layer 31, a P-type collector region 32, an N-type base region and a P-type emitter region 34 are formed. Thus a vertical type P-N-P Tr 30, which forms a complementary pair with the Tr 26, is formed. At a MOS Tr part on the surface of an epitaxial layer 22, a P-channel type MOS Tr 40 having P-type source and drain regions 39, which are formed in the same step as the region 34, and an N-channel type MOS Tr 41 having a P-type well region 43, which is formed in the same step as the region 32, and N<+> type source and drain regions 44, which are formed as the same step as the region 28, are formed. Thus, the complementary bipolar Tr and the complementary type MOS Tr can be efficiently combined on one substrate 21.
申请公布号 JPS63287051(A) 申请公布日期 1988.11.24
申请号 JP19870122315 申请日期 1987.05.19
申请人 SANYO ELECTRIC CO LTD 发明人 OKODA TOSHIYUKI
分类号 H01L21/331;H01L21/8249;H01L27/06;H01L29/73;H01L29/732 主分类号 H01L21/331
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