发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce the circuit element by connecting plural storage means to a 1st storage means. CONSTITUTION:When a signal with chattering is inputted to an input terminal 1, a master latch 3 is in the through state with a clock signal 102 at an H level, one of slave latch groups 3 is brought into the through state by an H level of a clock signal 103 to eliminate the chattering, the signal is latched by the trailing of the clock signal 103 and correct data is stored. The master latch circuit is used in common and operated on each occasion, then a flip-flop circuit is constituted between plural slave latches. Since one master latch is enough to plural slave latches, the number of circuit components is reduced.
申请公布号 JPS63287207(A) 申请公布日期 1988.11.24
申请号 JP19870123519 申请日期 1987.05.20
申请人 SEIKO EPSON CORP 发明人 NASU HIROAKI;SATO HISAO;ABE SUKEYUKI;HAGIWARA YASUAKI
分类号 H03M9/00;H03K5/01;H03K5/1254 主分类号 H03M9/00
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