| 摘要 |
PURPOSE:To strengthen the logic function of a logic circuit device per gate by maintaining the impedance ratio to the gates as an inverting logic circuit constant, and so composing to connect transistors that a logic threshold voltage is invariable. CONSTITUTION:The source electrodes of driving FETs 11D, 12D are connected to a power line VSS, and drain electrodes are both connected to an output terminal X. The drain electrode of a load FET 11L is connected to a power line VDD, and a source electrode is connected to a gate electrode, i.e., the output terminal X. An input signal is applied to the gate electrodes A, B of the FETs 11D, 12D to obtain an inverting logic signal from the terminal X. The two FETs 11D, 12D are connected in parallel, and since either one FET is cut OFF in operation, the W/L ratio at the FET side is the same as that of one FET, and the value becomes 10. The W/L ratio at the load FET side is 6, and the impedance ratio accordingly becomes 0.6. Thus, the logic function per gate is strengthened to improve the performance in the circuit operation. |
