CLOCK CONTROL SYSTEM

摘要

PURPOSE:T maintain the stuff rate and the frequency accuracy as it is by using a reception asynchronous clock obtained from a reception data from an opposite station through smoothing at a PLO after destuffing as a low-order group input clock when a low-order group input clock is interrupted. CONSTITUTION:When a low-order group input clock CSL is interrupted, it is detected by a clock interruption detection circuit 1 and a selector 2 outputs selectively a clock CRL from a reception PLO 16 to input the clock CRL to a phase comparator 4, on the other hand, in an AIS (Alarm Indication Signal) insertion circuit 5, the AIS signal is outputted as a transmission data. Since the clock CRL from the reception PLO 16 satisfies the specified frequency accuracy, the phase comparator 14 is operated normally,a stuff bit is inserted by a stuff insertion circuit 6 at a specified stuff rate and the AIS signal with normal stuff inserted thereto is multiplexed by a multiplex circuit 8 and sent to the opposite station.