发明名称 Electrically erasable fused programmable logic array
摘要 A programmable logic gate array employing a plurality of reprogrammable fuses having a logical NAND characteristic for logically connecting selected inputs to selected logic gates. The fuses are selectively programmed for providing appropriate signals to allow three modes of operation of the logic gate array; programming, erasure and normal logic operation.
申请公布号 US4787047(A) 申请公布日期 1988.11.22
申请号 US19850714866 申请日期 1985.03.22
申请人 INTERSIL 发明人 WEI, JAMES Y.
分类号 H03K19/177;(IPC1-7):G06F7/38 主分类号 H03K19/177
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