发明名称 METHOD FOR CONTROLLING PLL CIRCUIT
摘要 PURPOSE:To prevent the occurrence of the disturbance of synchronization with respect to a reproduced video signal by selecting a reproduced horizontal synchronizing signal as an input signal being an object of synchronization in the vertical blanking period of the reproduced video signal, just after track jump or in a period when no color burst signal exists in the reproduced video signal. CONSTITUTION:A selector 26 is returned to the position (a) and an object of lock is switched to the reproduced horizontal synchronizing signal for a vertical blanking period, just after track jump, search period or a period where no color burst signal is inputted. Moreover, when the color burst is locked, a selection 24 is switched to the position (b) to select an output of an adder 23. In this case, a control circuit 20 calculates a phase difference of outputs of a phase comparator 27 and an output of a phase comparator 22 and averages the result and gives it to other input of the adder 23. Thus, the output of the adder 23 reaches a value nearly equal to the phase to phase error of the color burst signal. Thus, the synchronization is not disturbed by the reproduced video signal.
申请公布号 JPS63286091(A) 申请公布日期 1988.11.22
申请号 JP19870121842 申请日期 1987.05.19
申请人 PIONEER ELECTRONIC CORP 发明人 MORIYAMA YOSHIAKI
分类号 H04N9/896;H03L7/08;H03L7/087;H04N9/89 主分类号 H04N9/896
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