发明名称 CLOCK GENERATOR
摘要 PURPOSE:To obtain two outputs whose frequency ratio is very close to an integer with simple constitution by extracting an output relevant to the outputs of an oscillator and a 2nd programmable frequency divider. CONSTITUTION:The output of the oscillator 18 which outputs a signal of prescribed frequency is inputted to a PLL circuit 25 which multiplies a frequency through a 1st programmable frequency divider 19 and the output of the PLL circuit 25 is sent out through the 2nd programmable frequency divider 24. The ratio of the output frequency of the oscillator 18 and the output frequency of the 2nd programmable frequency divider 24 is therefore set optionally and the output is generated according to the output of the oscillator, so relative frequency accuracy is improved. Consequently, beats between two outputs is easily obtained.
申请公布号 JPS63283317(A) 申请公布日期 1988.11.21
申请号 JP19870118555 申请日期 1987.05.15
申请人 YOKOGAWA ELECTRIC CORP 发明人 IKEGAMI TAKETOSHI
分类号 H03L7/18;G01R31/3183 主分类号 H03L7/18
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