发明名称 PARALLEL PICTURE SIGNAL OUTPUT CIRCUIT
摘要 PURPOSE:To simply control a parallel picture signal by using a line memory (FIFO) and providing a refresh function by a selector. CONSTITUTION:The selector 10 selects a next line signal string inputted from a picture signal reading part and the input of a current line FIFO 30 from the current line signal string of the output of the current line FIFO 30 and a selector 20 selects the input of a preceding line FIFO 40 from the preceding line signal string of the output of the current line signal string and the preceding line FIFO 40. Namely, the current line FIFO 30 inputs the next line signal string and outputs the current line signal string before one line, the preceding line FIFO 40 inputs the current line signal string and outputs the preceding lie signal string before one line. In such a way, a picture signal of three lines is outputted in parallel. Then, the refresh is carried out by using a block in which an output picture signal string is considered to be invalidated and the respective internal data of the respective FIFOs 30, 40 is refreshed. Thereby, the parallel signal can be simply controlled.
申请公布号 JPS63283361(A) 申请公布日期 1988.11.21
申请号 JP19870118435 申请日期 1987.05.15
申请人 NEC CORP 发明人 TAKAHARA TORU;HASHIMOTO HIROMITSU
分类号 H04N1/21;G06T5/20;H04N1/40 主分类号 H04N1/21
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