摘要 |
PURPOSE:To enable adjustment on an IC to be performed even in a circuit on the IC after manufacture, by providing first plural gates which pass a delay signal from either a line segment part corresponding to a controlling signal and a second gate which takes out a delay output setting the outputs of the plural gates as the inputs. CONSTITUTION:A circuit is constituted in such a way that a wiring L between the gates is divided into arbitrary number of line segments, and the AND of the signals of the wirings L1-LN branched from respective line segment and the signals of N signal lines I1-IN from the outside are taken, and the OR of the N number of AND outputs is taken. By setting the signal line I2 at 1, the output 1 arrives at an AND gate A2 delayed by a part (l2) passing the line segment part compared with the one arriving at an AND gate A1, and it is taken out from an OR gate 2, and is transferred to the next stage. Also, by selecting the signal line I3 as the signal line to be set at 1, the output delayed by a time required for the passage of a line segment (l3) further can be obtained as the output 1. Thus, it is possible to adjust a delay time by adding the signal via the signal lines I1-IN.
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