| 摘要 |
PURPOSE:To alternately transfer output data from a signal processing circuit to other signal processing circuits by means of simple constitution by alternately leading out outputs from the preceding signal processing circuit to two succeeding signal circuits in response to clock signals to allow the succeeding circuits to execute respective signal processing synchronously with a clock signal and an inverted clock signal. CONSTITUTION:A digital signal processing circuit DSP1 processes an inputted sound signals of two channels and applies sound signals of four channels to a digital signal processing circuit DSP2. The circuit DSP2 stores sound signals to front left and right side speakers FL, FR and rear left and right side speakers RL, RR in series in respective shift registers SR17, 18. A control circuit 25 outputs a signal 2 and an inversed signal 3 in response to a clock signal shown in waveform diagram 1 and a control circuit 25 outputs signals 4, 5 to lines 26, 27. Consequently, the SR17, 18 outputs said sound signals of 4 channels. The sound signals are applied to D/A converters 30, 31. The converter 30 receives only the sound signal from the SR 17 and converts the signal to analog sound signals for the FL, FR and outputs the converted signal. The converter 31 also is similarly driven. |
