发明名称 BLOCK ACCESS MEMORY
摘要 PURPOSE:To improve the effective use efficiency of a block access memory by selecting and refreshing the word line of a block which is not selected in parallel to the access of a selected block by a refreshing address counter output. CONSTITUTION:The title memory is provided with plural memory cells 4 in which a memory array is divided into a block B1 and a block B2, arranged to respective blocks in a row and column shape and stored the information respectively, plural word line 2-1-2-n, plural bit lines 3, and a sense amplifier group 5 to activate, detect and amplify the information to appear on a bit line in response to an activating signal inversion SE. For respective blocks, the word line is selected and accessed in response to the external address, data reading or writing are executed, and the word line of the block not to be accessed is selected and refreshed in parallel to the access of the selected block. Thus, simultaneously with the cycle of usual data reading or writing, a refreshing cycle is executed and the effective use efficiency can be improved.
申请公布号 JPS63282997(A) 申请公布日期 1988.11.18
申请号 JP19870119213 申请日期 1987.05.15
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUJISHIMA KAZUYASU;MATSUDA YOSHIO;HIDAKA HIDETO
分类号 G11C11/401;G11C8/12;G11C11/406;G11C11/407;G11C11/409 主分类号 G11C11/401
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