| 摘要 |
PURPOSE:To quickly perform processing by transferring block data in accordance with the conceptual execution order of an instruction, which issues an operand read-out request, at the time of absence of block data in plural buffer memories from which data can be read out simultaneously and independently of one another. CONSTITUTION:Operand addresses calculated in accordance with preceding and succeeding instructions in the conceptual execution order are sent to buffer memories 201 and 202, and a block transfer request signal circuit 301 (302) generates a block transfer request signal if a buffer data read-out request is issued but data is absent in buffers. When this signal is generated from the circuit 301 (302), a precedence deciding circuit 305 prefers the request from the memory 201 and sends a corresponding request signal to a main storage 3 and transmits it to a block transfer monitor circuit 306 to suppress following data write.
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