发明名称 MULTI-PROCESSOR SYSTEM
摘要 PURPOSE:To execute easily and economically a debug by connecting a shared debugger to a shared bus of a system containing a common memory shared by plural processors. CONSTITUTION:Processors 20 and 21, a common memory 31 which is shared by those processors, an I/O channel device 33 and a shared debugger 34 are connected to a common bus 30. The processors 20 and 21 contains processors 22 and 23, local buses 24 and 25, and local memories 26 and 27. The local data is processed internally and does not occupy the bus 30. When accesses are given to the memory 31 and the channel device 33 or a debugging mode is set, the processors 20 and 21 occupy the bus 30 via common bus interfaces 28 and 29 respectively. Then these processors convert the addresses on the buses 24 and 25 and deliver dummy addresses to the bus 30 to transfer data. In such a way, the occupying time of the bus 30 is reduced to facilitate easy execution of debug.
申请公布号 JPS5981750(A) 申请公布日期 1984.05.11
申请号 JP19820108768 申请日期 1982.06.24
申请人 FUJI DENKI SEIZO KK;FUJI FUAKOMU SEIGIYO KK 发明人 TAKEI TAKANORI
分类号 G06F11/28;G06F13/00;G06F15/16;G06F15/167;G06F15/177 主分类号 G06F11/28
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