发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To improve the use efficiency of a common bus by sending a request of read of a channel command word (CCW) from the address, which a command address word (CAW) indicates, to a memory access controller and reading out the specific CCW and sending it to the common bus. CONSTITUTION:A CPU 2, a channel 3, and a memory access controller 5 are connected to an 8-byte common bus 1, and the channel 3 is provided with a collective processing request signal generating part 9, and the controller 5 is provided with a CCW access control part 10. When the CPU 2 executes an input/output instruction, the generating part 9 requests to use the bus 1 and requests the controller 5 to transfer contents of a CAW 7 and CCW 8, and the control part 10 in the controller 5 accesses the CAW 7 to get the storage address of the CCW in accordance with contents of the CAW 7 and reads out the CCW and sends it onto the bus 1 together with the CAW.
申请公布号 JPS63280361(A) 申请公布日期 1988.11.17
申请号 JP19870116318 申请日期 1987.05.13
申请人 FUJITSU LTD 发明人 KITAZAWA MASAHIRO
分类号 G06F13/12 主分类号 G06F13/12
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