| 摘要 |
PURPOSE:To generate automatically a consecutive clock signal synchronously with a burst signal even in the absence of a synchronizing signal to form a substantial burst gate by providing a synchronizing pattern in a digital signal and shifting sequentially the phase of the burst gate till the synchronizing pattern is received. CONSTITUTION:For example, when a burst gate output from a burst gate generator 8 is a burst gate output (b), since the burst gate is deviated from the burst clock location of a burst clock signal (a), a burst control APC (Automatic Phase Control) circuit 3 is not synchronized with the burst block. Thus, no synchronizing signal is detected by a synchronizing pattern detector 4. A dissidence pulse signal(c) is generated at the output of a dissidence detector 6 and the phase of an N counter 5 is shifted by one clock and the burst gate output is shifted like the burst gate output (d). The operation above is repeated sequentially and the burst control APC circuit 3 is synchronized with finally at the location of the burst gate output (e). |
