DIVISION PROCESSING CONTROLLER

摘要

PURPOSE:To perform the division processing at high speed by using four control means to decrease the number of steps of a division routine. CONSTITUTION:A 1st memory means stores a divisor and the 2nd and 3rd memory means store a dividend and the quotient obtained from the division processing. While the residue of said division is stored in a 4th memory means. A counting means 17 counts the number of loops. A 1st control means 11 performs a 1-bit left shift including the carry caused by the division to perform a count-down action via the means 17. A 2nd control means 14 shifts the values set at the 2nd and 4th memory means to the left by a bit including the carry produced by the means 11. A 3rd control means 16 subtracts the value set at the 1st memory means from the value set at the 4th memory means. Then a 4th control means 15 controls the number of division processing loops by the value of the means 17. Thus it is possible to decrease the number of steps of a division process and to increase the division processing speed.