| 摘要 |
PURPOSE:To increase the data transfer speed and to decrease the number of parts for a data transfer device by providing a shared memory on an I/O map with a main CPU and on a memory map with a sub-CPU respectively. CONSTITUTION:The titled device is provided with a shared memory 9 is provided to perform the transfer of data with each CPU, a main CPU circuit containing a main CPU 11, a sub-CPU containing a sub-CPU, and a control circuit 15. The main CPU performs the input/output of data via an I/O port 12 and contains the memory 9 on an I/O map. While the sub-CPU circuit contains the memory 9 on a memory map of the CPU 13. At the same time, the circuit 15 secures the selective accesses of both CPU circuits to the memory 9. The hardware which controls the memory 9 is allocated to an I/O in the main CPU and to a memory space in the sub-CPU respectively. In such a constitution, the number of hardware parts can be decreased and the data transfer sped can be increased. |
