| 摘要 |
PURPOSE:To reduce the number of steps and to etch the N<+> type semiconductor layer of a channel under good controllability by removing a resist pattern formed on a section to become a thin film transistor as etching is proceeded, and removing the N<+> type semiconductor layer in the same step. CONSTITUTION:A gate electrode 2 is formed in a desired pattern on an insulator substrate 1, and a gate insulator layer 4, a semiconductor layer 5, an N<+> type semiconductor layer 6, metals to become a drain 7 and source 8 electrodes are sequentially formed to cover the electrode 2. Then, the source 8 and the drain 7 electrodes are patterned, a resist pattern 11 is formed on a section to become a thin film transistor, the layers 5, 6 except a section to become the transistor are removed, the pattern 11 is simultaneously removed to remove the layer 6 of a channel section. Thus, the etching of the layer 6 is performed with good controllability, and the number of steps can be reduced. |
