| 摘要 |
PURPOSE:To eliminate the redundancy in the circuit and to improve the degree of circuit integration by using a shift register employed for a time signal generating section and a delay detection section operated alternately in the intermittent reception circuit in common. CONSTITUTION:The shift register 1 is used in common for the time signal generating section 100 and the delay detection section 200 according to the following: With a changeover signal VS of a control section 5 in standby mode, power is supplied to a circuit including the register 1, a gate circuit 2 and a decoder circuit 4 to constitute the time signal generating section 100 where a time pulse VT is outputted from the circuit 4. With the signal VS in the reception mode, power is supplied to a circuit having the register 1 and a gate circuit 3 to constitute the delay detection section 200 where a detection signal V0 is outputted from the circuit 3. That is, the signal generating section 100 and the detection section 200 are operated alternately by the signal VS. Thus, the redundant circuit is removed and the circuit integration is improved. |
