发明名称 HIGH SPEED BUS ARBITRATION CIRCUIT
摘要 PURPOSE:To attain bus acquisition by providing a constant current source to each unit, allowing a unit issuing a bus request to supply it to a bus line, and allowing each unit to detect a voltage drop across a resistor provided to the line thereby judging whether the request is addressed only to itself or to plural stations. CONSTITUTION:When each unit does not issue any request, a switch 3 is turned OFF, no current flows to a bus line 5 and no voltage drop exists across a resistor 6 and the voltage of the line 5 is zero. When a unit desires to acquire a bus, a request signal is outputted from a bus requester 2 to the switch 3 after zero voltage is confirmed by a level comparator, an output current from a constant current source 1 is fed to the line 5 to cause a voltage of e.g., 2.5V across the resistor 6. Then the pulse comparator 4 compares the voltage and when the voltage is 2.5V, it is recognized that the acquisition request comes from the station only and the voltage is restored to zero after the real cycle. If a request exists earlier, since the voltage reaches>=2.5V, retrial is actuated after being in the standby state.
申请公布号 JPS63276935(A) 申请公布日期 1988.11.15
申请号 JP19870030123 申请日期 1987.02.12
申请人 SEIKO INSTR & ELECTRONICS LTD 发明人 TACHIBANA HITOSHI
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