发明名称 |
Cascade filter structure with time overlapped partial addition operations and programmable tap length |
摘要 |
A filter structure uses multiple discrete filter circuits which are cascaded to provide a multiple tap filter of programmable tap length. In one form, an FIR filter may be implemented wherein each circuit generates partial sum operands which must be added to provide a filter output. The cascaded circuits perform partial addition operations near simultaneously by using a serial addition which is synchronized with a start bit. The number of taps in the filter structure implemented by the cascaded discrete filter circuits is variable and may be programmed with a programmable storage register in each discrete circuit which stores operand data fixing the tap length of each discrete circuit. The multiple filter circuits provide a single filter structure with a large tap length and high sampling rate.
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申请公布号 |
US4785411(A) |
申请公布日期 |
1988.11.15 |
申请号 |
US19860901850 |
申请日期 |
1986.08.29 |
申请人 |
MOTOROLA, INC. |
发明人 |
THOMPSON, CHARLES D.;GERGEN, JOSEPH P.;MARTIN, BRADLEY;HILLMAN, GARTH D. |
分类号 |
H03H17/02;(IPC1-7):G06F7/38 |
主分类号 |
H03H17/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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