LOGICAL SIMULATION DEVICE

摘要

PURPOSE:To attain a parallel processing or a pipeline processing and to execute a high speed logic circuit simulation by executing a synchronous type and an asynchronous type scheduling by first and second evaluation event take-out parts. CONSTITUTION:The first evaluation event take-out part 150 decides the event fed to an event evaluation part 170 according to the synchronous type scheduling and the second evaluation event take-out part 160 decides the event according to the asynchronous type scheduling. The take-out part 150 always refers to the event in an event storing part 140 and feeds the event having an event time coinciding with a current time Tc to the evaluation part 170 as one which can be evaluated. The take-out part 160 refers to the event in the storing part 140. The event minimum in the event time in respective elements or the event in which any input signal state does not apparently change signal state of the output terminal of the element is decided to be one which can be evaluated. The event is taken out from the storing part 140 and fed to the evaluation part 170.