| 摘要 |
PURPOSE:To reduce the chip area of an arithmetic unit by using a read only memory for executing a binary coded decimal transformation. CONSTITUTION:Input signals 10, 20 are '9' and '3', respectively, an addition/ subtraction selecting signal SUB is a logic level '0' and an addition is selected, and when a DB selecting signal 42 is a logic level '1' and a binary coded decimal number is selected, an addition is started by a binary arithmetic unit 1 from the time point when '9' is latched by the signal 10 and '3' is latched by the signal 20, and a carry/bollow output 31 outputs '0' and 1100 as a carry and a binary output 30, respectively. Subsequently, the binary output 30 of the unit 1 becomes address information and pre-charge of a ROM 2 is executed in a period extending from the leading of a clock signal CLK to the trailing, discharge is started by the trailing, and read-out is executed. The result of calculation becomes '12' by 4 bit output = 0010 of an output 50. In such a way, the calculation can be executed by a small chip area. |
