发明名称 JOSEPHSON INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce the probability of malfunction due to punch-through by connecting a DC power supply to a load resistor of a Josephson digital gate in a bias current regulator of a Josephson digital circuit via a dropping resistor. CONSTITUTION:A DC current input terminal DC2 is connected to a load resistor (r) of a Josephson digital gate 3 via a dropping resistor R2. That is, a 2nd power supply bus 6, a 2nd DC current input terminal DC2 and a 2nd dropping resistors R21-R2n are added to a conventional circuit. Thus, a bias current IDC2 is supplied to each Josephson gate/load resistor pair via the bus 6 and the resistors R21 R2n from the input terminal DC2. In selecting the resistance of a 1st dropping resistor as R11=R12=...=R1n=R1, the resistance of the 1st dropping resistor as R21=R22=...=R2n=R2 and the resistance of the load resisters as r1=r2=...=rn=r, then the relation of the resistors is selected as R1>>r, R2>>r. Thus, the probability of punch-through of the Josephson gate 3 becomes smaller than that in the absence of the reset cycle. Thus, the probability of malfunction due to punch-through is reduced remarkably.
申请公布号 JPS63274213(A) 申请公布日期 1988.11.11
申请号 JP19870108338 申请日期 1987.04.30
申请人 NEC CORP 发明人 SAI CHIYOUSHIN
分类号 H03K17/92 主分类号 H03K17/92
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