| 摘要 |
PURPOSE:To obtain a high-speed and large-scaled MIS-type semiconductor integrated circuit high in yield by a method wherein an effective channel length of a MOS transistor is controlled through ion implantation and the condition of a heat treatment. CONSTITUTION:A drain.source N<+> layers 16 and 16' are formed by performing ion implantation through a gate electrode serving as a mask, and moreover p-type impurity is ion-implanted into the source electrode 16' side as the drain electrode 16 is masked through a photolithography technique. The dose of the implanted ion is determined so as to render a substrate surface p-type with cancellation of an N<-> layer 13 and set the surface adequate in concentration to obtain a prescribed threshold voltage. L is determined according to the ion implantation energy and the dose employed to form a channel doped region 15 and the condition of heat treatment for activation, where L denotes a effective channel length and can be easily controlled to be Lapprox.=0.1mum. By these processes, a device can be easily built at high yield.
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