发明名称 MOVING PICTURE PROCESSOR
摘要 <p>PURPOSE:To scale down a device by providing a control circuit which controls a picture memory and an input-output bus and composing multistage processing of one stage parallel multi-processor when the multistage processing such as pre-filtering processing, encoding processing 1, information volume estimating processing and encoding processing 2 is executed. CONSTITUTION:When a control signal 107 from the control circuit 6 is '1', an input picture signal stored in the memory 5 is outputted to the moving picture input bus 100 and a picture sampled value is outputted to a sequential. A fetching command and a processing beginning instruction 104 are outputted to each unit processor from the control circuit 6. A moving picture signal after the pre-filtering processing outputted to a moving picture output bus 102 is written in the picture memory 5 again. After the processing is finished, each unit processor makes a processing finishing signal 105 (flag signal) to '1' from zero for the control circuit 6 and informs the processing is finished. The control circuit 6 receiving the processing finishing signal makes the control signal 107 to '1' from zero again for the picture memory 5 in a next scanning section and controls to transfer the picture signal of the next scanning line to each unit processor through a form bus 100. Thus the multistage processing can be effectively executed by one stage parallel multi-processor.</p>
申请公布号 JPS63274279(A) 申请公布日期 1988.11.11
申请号 JP19870108261 申请日期 1987.04.30
申请人 NEC CORP 发明人 ENDO YUKIO;HARASAKI HIDENOBU
分类号 H04N19/00;G06F15/16;G06F15/80;H04N19/124;H04N19/149;H04N19/196;H04N19/42;H04N19/423;H04N19/436;H04N19/503;H04N19/61;H04N19/625;H04N19/80 主分类号 H04N19/00
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