发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To enable easily the design and the formation of an integrated circuit, by forming conductor segments for a bundle wiring on a master slice constituted by arranging function cells in columns and rows on a semiconductor substrate. CONSTITUTION:On a semiconductor substrate 1 constituting a master slice, a plurality of function cell columns 2 are formed, and in the center part thereof, conductor segments 3 for a bundle wiring are formed, in which a signal wiring 4 connecting to a function cell is formed. Therefor, a bundle of signal lines can be connected to the conductor segments 3 for a bundle wiring, so that it becomes unnecessary to draw around signal lines, and the design and the formation of an integrated circuit are facilitated.
申请公布号 JPS63275138(A) 申请公布日期 1988.11.11
申请号 JP19870111313 申请日期 1987.05.06
申请人 NEC CORP 发明人 KITAJIMA FUMIHIDE
分类号 H01L21/3205;H01L21/82;H01L23/52;H01L27/118 主分类号 H01L21/3205
代理机构 代理人
主权项
地址