发明名称 BAND LIMITING CIRCUIT
摘要 PURPOSE:To widely decrease the number of delay elements and arithmetic steps obtained by multiplying and adding, to miniaturize a circuit and to expand the function of a system as a whole, by making a filter part into a cyclic filter. CONSTITUTION:A sixth cyclic filter part 22 has 11 delaying elements together with an input delaying element 23 and an output delaying element 24, and a signal is band-limited by 15 times of multiplying and adding. A signal band- limited by a sixth cyclic filter part 23 is inputted from the output delaying element 24 of the sixth cyclic filter part 22 through a decimeter part 2 to sample down a signal to 16:1 and a 10th cyclic filter part 26. The 10th cyclic filter part 26 has 16 delaying elements together with an output delaying element 27 of the 10th cyclic filter part 26 and the signal is band-limited by 25 times of multiplying and adding. Thus, the signal band-limited by the 10th cyclic filter part 26 is outputted from the output delaying element 27 of the 10th cyclic filter part 26 through an output terminal 28.
申请公布号 JPS63272116(A) 申请公布日期 1988.11.09
申请号 JP19870104633 申请日期 1987.04.30
申请人 OKI ELECTRIC IND CO LTD 发明人 SUZUKI YUKIO;SHIINO HARUHIRO;SHOJI YASUO;ANDO HIROMI
分类号 H03H17/00;H03H17/02;H03H17/04 主分类号 H03H17/00
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