发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To process a shift, etc., at a high speed by specifying a bus buffer which connects a data superposing circuit and a multibit data bus with an instruction code. CONSTITUTION:A general microcomputer 2 equipped with an 8-bit processor and a 1-bit processor 1 are combined together to constitute a sequencer controller. A 1-word 8-bit I/O memory 3 for storing an output state, the data superposing circuit 4 which substitutes bits outputted from the memory with the output of the 1-bit processor 1, and buffers B0-B7 are provided between the output part of the 1-bit processor 1 and the data bus 5 of the microcomputer 2, and a buffer encoder 8 is further provided. Then shift and rotation arithmetic instruction processes as to word and data processing instructions is performed only by specifying bus buffers B0-B7 which connect the superposing circuit 4 to the data bus 5 with instruction codes.
申请公布号 JPS63271604(A) 申请公布日期 1988.11.09
申请号 JP19870106690 申请日期 1987.04.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KOMINAMI SHINYA
分类号 G05B19/05;G05B19/04 主分类号 G05B19/05
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