发明名称 SWITCHING CONTROL CIRCUIT
摘要 PURPOSE:To suppress the transmission of an undesired burst signal due to transient phenomenon at the interruption of the device power supply or at voltage drop by means of a simple circuit in a TDMA communication system by driving a switching circuit by an output of a NAND gate receiving an output of a detection means detecting the power supply voltage drop and a burst control signal. CONSTITUTION:A power voltage drop detection means 1 uses a voltage comparator 13 to compare a power voltage VE with a voltage division by a breeder circuit 11, and to give an output V1 as an L level for a prescribed time taudepending on a resistor and a capacitor 12 in the breeder circuit 11 and as an H level for other time. The NAND gate 2 receives a bust control signal Vb aud the output V1, and an output V2 of the gate 2 is at H with the output V1 set at L level regardless of the level (H or L) of the signal Vb. In a switching circuit 3 intermitting a burst signal output Vout turning on/off the burst signal input Vin by the output V2, the switching circuit 3 is turned on by the H level of the signal V2 to interrupt the input Vin and to make the output Vout zero.
申请公布号 JPS63272236(A) 申请公布日期 1988.11.09
申请号 JP19870107186 申请日期 1987.04.30
申请人 FUJITSU LTD 发明人 KIYONO HIDEKI;YUASA SHINJIROU
分类号 H04J3/00;H04B7/15 主分类号 H04J3/00
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