发明名称 EXTERNAL SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To prevent malfunction of a sequential control circuit due to the disturbance in the transition of the internal state by counting the period in response to the internal state of the sequential control circuit at a point of time of an external synchronizing signal is inputted to stop the operation of the sequential control circuit during the counting time. CONSTITUTION:With an external synchronizing signal 6 inputted to an external synchronizing circuit, a value 10 corresponding to an internal state 9 of the sequential control circuit 2 is set to a counter circuit 4 at that point of time. A control signal 12 in response to the count 11 of the circuit 4 is outputted by a decoder 5 and an inhibition gate 1 stops the clock 8. The circuit 4 continues counting according to a clock 7 and the count is continued till a stop signal 14 of the counter circuit 4 is outputted. The control signal 12 is switched when the count 11 becomes a prescribed value, the clock 8 is outputted and the sequence control circuit 2 restarts the operation.
申请公布号 JPS63272224(A) 申请公布日期 1988.11.09
申请号 JP19870107708 申请日期 1987.04.30
申请人 SEIKO EPSON CORP 发明人 HAGIWARA YASUAKI;SATO HISAO;NASU HIROAKI;ABE SUKEYUKI
分类号 H03K5/135;G06F1/04;H03K21/00;H03K23/00;H03K23/58;H03K23/66 主分类号 H03K5/135
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