| 摘要 |
PURPOSE:To obtain a processor system which has longer virtual address length than a conventional processor and an instruction set with high performance and high reliability while maintaining compatibility by providing a 1st processor which has m-bit virtual address length and a 2nd processor which shares a main storage with the 1st processor and has m+n-bit virtual address length and the same data format and actual address length with the 2nd processor. CONSTITUTION:This system is provided with the conventional processor 20 which has m-bit virtual address length, the new processor 30 which shares the mean storage with the processor 20, has the m+n-bit virtual address length exceeding the virtual storage capacity of the processor, and also has the same data format and actual address length with the processor 20 and a different instruction system, a means which allows the processor 20 to call the new processor 30, and a means which allows the processor 30 to call the processor 20. Consequently, the size of the virtual address apace can be increased, so while the compatibility is maintained, a program of up to 2<n>-fold size can be executed.
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