发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enable a test to be performed with a simple equipment by a method wherein an inner clock generating circuit, used only for a burn-in test (BT), is built in a large scale integrated circuit(LSI). CONSTITUTION:Terminals 3 and 4 are externally connected with a crystal oscillator or a capacitor when a LSI is used in a normal mode, where a precise pulse necessary for the operation of the LSI is generated by a oscillating circuit 5. The clock pulse generated by the oscillating circuit 5 is applied to a circuit 16 of the LSI through a NAND gate 14 and a NOR gate 15, thereby the whole LSI is rendered to be in a prescribed operation. On the other hand, a terminal 11 is connected with a power supply line while a BT test is being performed, where a CR oscillating circuit 10 generates a prescribed clock pulse which is supplied to a circuit 16 of the LSI circuit through the NOR gate 16. And, the clock pulse used for the BT test does not need to be especially precise and therefore the CR oscillating circuit consisting of resistors and capacitors, which can be formed on a LSI, can be used for generating the said clock pulse. By these processes, the test equipment can be simple in structure.
申请公布号 JPS63271966(A) 申请公布日期 1988.11.09
申请号 JP19870105826 申请日期 1987.04.28
申请人 NEC CORP 发明人 NAKAJIMA TOSHIO
分类号 G01R31/28;H01L21/66;H01L21/822;H01L27/04 主分类号 G01R31/28
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