| 摘要 |
PURPOSE:To speedily enable a processor to judge an interruption destination by realizing a communication function even by a processor which has no read- modify-write function. CONSTITUTION:When a processor 11 initiates an interruption to a processor 10, the MSB of an address #1 of an interruption register part 2 corresponding to the processor 10 is set. When this bit is set, its output is passed through an OR gate 3 to interrupt the processor 10. Further, a bit is set for data of an interruption status part 4 assigned to the processor 11. Further, the interrupted processor 10 judges which processor initiates the interruption from the data. Then the processor 10 resets the MSB of the address #1 of the interruption register part 2 to clear the interruption.
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