| 摘要 |
PURPOSE:To reduce interference between two stations by outputting the whole of addition results as a multivalued code by adding a specified signal to outputs of each stage of a pseudo-random series generator, which generates a pseudo-random series of prime number values, by regarding prime numbers as moduli. CONSTITUTION:A pseudo-random series generator 1 is composed as a three-stage binary M system generator of one-bit registers 10-12 and an exclusive logical circuit 13. Respective outputs of those registers 10-12 are inputted to an adding circuit 2 on the basis of a constant-period clock. Outputs of the registers 10 and 12 are inputted to the register 11 via a circuit 13. Further, the predetermined three- bit pattern of each station is stored in an ROM3 as a signal which selects a diffusion code for the station and the selective signal is added to exclusive adding circuits 20-22 of the circuit 2 to be added to the output of each stage of the generator 1 by modulus ''2'' for multivalued encoding, thus reducing interference between two stations. |
