发明名称 TRIGGER GENERATING CIRCUIT
摘要 PURPOSE:To form a trigger signal with respect to an analogue input signal and a logic input signal by the same circuit, by comparing the logical data of the higher ranking bit of a digitally converted signal to be measured with the logical level given to a trigger generating condition. CONSTITUTION:A trigger generating circuit 1 has a bit selection circuit 7 and the digital conversion data of an analogue channel signal or a multichannel logic signal is changed over to be inputted to the circuit 7. In the circuit 7, the number of bits for setting a trigger condition are indicated with respect to the digital conversion data of the analogue signal by a number-of-bit setting circuit 5 and the number of channels for setting the trigger condition are indicated with respect to the logic signal. Subsequently, the output signal of the circuit 5 is inputted to a digital comparator 9 through a gate circuit 6 to be compared with the reference data of the trigger condition from a reference value setting circuit 8. The output signal of the comparator 9 is inputted to a trigger pulse forming circuit 10 to form a trigger pulse. As mentioned above, the trigger signal can be formed with respect to the analogue input signal and the logic input signal.
申请公布号 JPS63269065(A) 申请公布日期 1988.11.07
申请号 JP19870104148 申请日期 1987.04.27
申请人 HIOKI DENKI KK 发明人 TEZUKA KIYOTO
分类号 G01R13/20;G01R13/28 主分类号 G01R13/20
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