发明名称 FIELD SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To continue a horizontal synchronizing signal keeping the normal value of one horizontal scanning period, by providing a control means which controls the field interval of a video signal inputted to the delay means of a CCD delay circuit, etc. CONSTITUTION:At the time of reproducing a field, a motor 46 is rotated at speed lower a little than that at the time of recording. A field video signal outputted from a reproduction circuit 40 is inputted to a variable delay circuit 48. A sawtooth wave forming circuit 60 outputs a trailing signal by an inputted PG pulse signal. The oscillation frequency of a voltage controlled oscillation circuit 34 is controlled by the signal. The delay time of a shift register 54 rises from 0.5H to 1H at the time of inputting the PG pulse signal. Thereby, the interval of the horizontal synchronizing signal of a video signal outputted from the shift register 54 becomes 1H even at the start end of the field, thereby, the horizontal synchronizing signal is continued.
申请公布号 JPS63268382(A) 申请公布日期 1988.11.07
申请号 JP19870103665 申请日期 1987.04.27
申请人 SANYO ELECTRIC CO LTD 发明人 HIRAI TADASHI
分类号 H04N5/91;H04N5/93 主分类号 H04N5/91
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