| 摘要 |
PURPOSE:To carry out a test without deteriorating the memory performance and the speed performance by reading an optional module selected by a user into a main memory device for the first time and using this module as the symbol information. CONSTITUTION:When an abnormal end is produced during execution of a load module 16, a debug control part 12 displays the name of the module having an abnormal end on a terminal 17. Then an executing route of the module which is designated by a user for display is displayed on the terminal 17. When the user designates the name of the module to be debugged, the symbol informa tion is supplied to a symbol information table 15. When the user designates the name of a variable to be displayed and set and a relative address is obtained within the module corresponding to said variable stored in the table 15. Then an absolute address of the module stored in a main memory device is obtained from a module position information table 13. Then said relative address is added to this absolute address and an absolute address of the relevant variable stored in the main memory device is obtained.
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