| 摘要 |
<p>PURPOSE:To always superiously maintain a memory element in a normally-off status by setting the gate voltage standard level of the memory element in reading to be a voltage so that the level goes to a non-conductive status between the source and the drain. CONSTITUTION:The hysteresis curve of a nonvolatile memory is in a shape close to a parallelogram, and the voltage level at the upper side is a write voltage Vt 101, while that at the lower side is an erasing voltage Vt 102. A gate voltage standard level 103 is set to a level lower than the erasing voltage Vt 102, however, it is not so low as likely to rewrite information in the memory. By making the standard of normal status of a gate voltage in such a level as the above, both the write voltage Vt 101 and the erasing voltage Vt 102 go to an enhanced side, hence a one-TR/one-cell system is enabled. Also, since most nonvolatile memories have a hysteresis characteristic similar to what is shown in the figure, such a standard level that both a write voltage Vt 101 and an erasing Vt 102 to go the enhanced side, can be set.</p> |
