发明名称 EMITTER FOLLOWER CIRCUIT
摘要 PURPOSE:To remarkably reduce the current consumption of the titled circuit by providing a differential switch between the emitter of 1st and 2nd emitter transistors(TRs) and a current source. CONSTITUTION:A complementary binary logic, for example, a high voltage level to a 1st input terminal 2 and a low voltage level to a 2nd input terminal 3, is fed respectively to the two input terminals 2, 3 in an emitter follower circuit. In this case, each input activates a differential switch composed of 3rd and 4th TRs 8, 9 through level shift circuits 11, 12. In this case, the 4th TR 9 having a base with a high voltage applied complementarily thereto is turned on and a current nearly equal to a current of a current source 10 coupled with the emitter flows to the 4th TR 9. Then the emitter of a 2nd TR 7 whose base is at a low level is decreased to the low voltage level and a low voltage level is outputted to a 2nd output terminal 3.
申请公布号 JPS63266909(A) 申请公布日期 1988.11.04
申请号 JP19870100358 申请日期 1987.04.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MORITAKE KAZUYUKI;MATSUZAWA AKIRA
分类号 H03F3/50;H03F3/34;H03F3/45 主分类号 H03F3/50
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