| 摘要 |
PURPOSE:To realize the simultaneous presence of a device containing a parity detecting means and another device containing no parity detecting means on a common bus, by performing the parity check only for the address and data received from the device containing a parity detecting means. CONSTITUTION:The address and a data parity valid signal 202 set on a common bus 200 decides execution of parity check. An address/data parity check circuit 11 is connected to an address parity signal 205, a data parity signal 206, an address parity valid signal 201 and a data parity valid signal 202 of the bus 200. Then the circuit 11 carries out the parity check of an address signal 203 and a data signal 204 of the bus 200. When a parity error is detected, an address parity error signal 102 and a data parity error signal 103 are outputted to a bus control circuit 10. In case a device containing no parity detecting function is set at the remote side, the transmission of a parity valid signal received from the common bus is inhibited.
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